This invention relates to a control system, e.g., an automobile engine control system, including a single-chip microcomputer, and more specifically to a method of recovery from a power-off state.
Microcomputer systems such as those used in automobile engine control system have a volatile memory, such as a random access memory (RAM), the contents of which should preferably be retained even while the control system is not operating. This is because part of the data in the RAM is updated or adjusted through learning control or the like, to suit the particular automobile, the particular environment in which the automobile is in use and the particular driver. When the RAM and the central processing unit (CPU) are on separate chips, it is possible to provide a back-up power supply to the RAM chip that holds the RAM contents intact while the system's main power, e.g., the one that is turned on and off by an ignition key switch, is off. A problem arises, however, in a single-chip microcomputer system in which the CPU and RAM are both on the same chip. If power is kept supplied to the chip, the CPU continues to run while the main power is off, causing current to be consumed unnecessarily. If the power is not supplied to the chip, however, the RAM contents are lost.
In answer to this problem, many recent single-chip microcomputers have a power-down mode. In the power-down mode, the CPU halts to reduce the power consumption but the on-chip RAM contents are kept unchanged. Thus when the microcomputer recovers from the power-down mode, program execution can restart with the same data in memory.
It is of course possible that the power supply might be interrupted while the microcomputer chip is in the power-down mode. In that case it is necessary for the RAM contents to be initialized on recovery from the power-down mode, so that program execution will not start with unpredictable data. It is therefore necessary to examine; on recovery from a power-down mode, whether the power supply has been interrupted. A prior art scheme for this examination is to have the CPU write a fixed value in a certain location in the on-chip RAM just before it enters the power-down mode. On recovery from the power-down mode, the first action of the CPU is to check this location in the RAM. If the value is unchanged, the RAM contents are considered to be intact and the CPU proceeds to execute its main program using the existing RAM data. If the value is incorrect, the power supply is considered to have been interrupted or to have failed and the CPU initializes the RAM contents before executing its main program.
The method of recovering from the power-down mode outlined above is unsatisfactory, however, for several reasons. One problem is that entry into the power-down mode is delayed by the amount of time required to write the fixed value in the RAM. Another problem is that space must be set aside for writing the value; this may strain the limited capacity of the on-chip RAM. A third problem is that recovery from the power-down mode is delayed by the time needed to execute the routine that checks the value in the RAM and decides whether the RAM contents are intact. A fourth problem is that this routine must be stored in program memory, where it occupies an undesirably large amount of space.